特殊技能:Masters or foreign equivalent degree in Electrical Engineering, Computer Engineering, or a related field.br br Must have the following skills set evidence by work experienceinternship or completed graduate coursework involved inbr br 1. RTL design, Verilog andor SystemVerilog;br 2. Synthesis tools such as Synopsys Design Compiler;br 3. Clock Domain Crossing;br 4. Scriptingprogramming language with at least one of the following PERL, Python, TCL, CC.br 5. STA and timing closure;br 6. Lower power design techniques.